Accordion M1
ESH10000597 · Rev R0
Generated 2026-06-05 18:17 UTC
Accordion M1 main board — R0 prototype. USB-C PD 20V input, TPS259474 E-Fuse protection on 3 rails, regulated outputs 5V/12V/3.3V/2.5V/1.8V/2.5VREF. Module connectors: SO-DIMM (J9), M2 (J15), N-Top (J10/J11/J12), Comtop (J3). I2C bus mux (74CB3Q3251) Ch0–Ch7. ADC monitoring via AD5593R (U24). Fan control via MAX6650 (U21). LED driver LP5012. RTC PCF8523 (U32). T1DATA[0:95] bidirectional bus routing. Enclosure: Hammond box with front/back/top panels.
Coverage
0%
Done
0%
Requirements
0
Test Cases
40
Records
37
Requirements
No requirements recorded.
Test Cases
| Code | Status | Category | Title / Signal | Target | Pass Criterion | Linked REQ |
|---|---|---|---|---|---|---|
| TC-A-00 | pass | functional | T1DATA[0:95] | — | All T1DATA[0:95] DAC → ADC readings match within ±0.1% at N-Top side. (Verified by inference from R.00/R.01 routing tests.) | — |
| TC-A-01 | pass | functional | T1DATA[0:95] | — | All T1DATA[0:95] DAC → ADC readings match within ±0.1% at SO-DIMM side. (Verified by inference from R.00/R.01 routing tests.) | — |
| TC-C-00 | pass | functional | M2 connector electrical connectivity — J15 | — | M2 module I2C, power rails, and routing signals electrically connected. I2C communication confirmed via TC-D-01. | — |
| TC-D-00 | pass | functional | I2C Ch0 scan — internal monitoring bus (bus mux Ch0) | — | I2C scan on Ch0 returns ACK from: CH224Q (0x22 or 0x23), PI4IOE5V6416 (0x20), ADS7828 (0x49), LP5012 (0x0C, 0x14), MAX6650 (0x48), 24AA02UID (0x50–0x57), PCF8523 (0x68). All expected devices respond. | — |
| TC-D-01 | pass | functional | I2C Ch1 scan — M2 module bus (bus mux Ch1) | — | I2C scan on Ch1 returns ACK from all expected M2 LR module devices. | — |
| TC-D-02 | pass | functional | I2C Ch2 scan — SO-DIMM module bus (bus mux Ch2) | — | I2C scan on Ch2 returns ACK from all expected SO-DIMM module devices. | — |
| TC-D-03 | pass | functional | I2C Ch3 scan — N-Top module bus (bus mux Ch3) | — | I2C scan on Ch3 returns ACK from all expected N-Top module devices. | — |
| TC-D-04 | pass | functional | I2C Ch4 scan — Comtop module bus (bus mux Ch4) | — | I2C scan on Ch4 returns ACK from: AD5593R (0x10), PI4IOE5V6416 (0x20), 24AA02UID (0x50–0x57). ISS-008 firmware fix must be applied. | — |
| TC-D-05 | pass | functional | SPI0_SCK, SPI0_MOSI, SPI0_MISO, SPI0_CS0_N, SPI0_CS1_N | — | Correct SPI response received via CS0_N. CS1_N inferred functional. Data integrity confirmed. | — |
| TC-D-06 | fail | functional | M2TxD, M2RxD, M2RTS, M2CTS | — | Data transmitted on M2TxD equals data received on M2RxD. RTS/CTS handshake verified. | — |
| TC-M-00 | pass | functional | N-Top module mounting — J10/J11/J12 seating and alignment | — | N-Top module connectors (J10, J11, J12) visually seated and aligned. Screw fixation correct. | — |
| TC-M-01 | pass | functional | SO-DIMM module mounting — J9 seating and latch | — | SO-DIMM connector (J9) visually seated and latch engaged. | — |
| TC-M-02 | pass | functional | M2 module mounting — J15 seating and screw-down | — | M2 module seated and screwed down in J15. No mechanical interference observed. | — |
| TC-M-03 | pass | functional | Comm module mounting — Comtop J3 seating and alignment | — | Comm module visually seated and aligned in Comtop connector (J3). | — |
| TC-M-04 | pass | functional | Hammond box mounting — PCB fit and standoff alignment | — | PCB fits into Hammond enclosure. Standoffs align correctly. ESW-120-44-T-D header installed. | — |
| TC-M-05 | pass | functional | Fan mounting — back panel attachment and clearance | — | Fan securely mounted to back panel with correct clearance. | — |
| TC-M-06 | pass | functional | Back panel mounting — alignment and secure fit | — | Back panel mounted, aligned, and securely fastened. Fan screws (all 4) engaged. | — |
| TC-M-07 | pass | functional | Top panel mounting — flush fit | — | Top panel flush fit with fastener engagement verified. | — |
| TC-M-08 | fail | functional | Front panel mounting — RPi connector alignment and flush fit | — | Front panel mounted with RPi connectors flush or recessed (≤0mm protrusion). USB-A/C connectors centred in cutouts. | — |
| TC-P-00 | pass | functional | VIN @ U10 pin 5 | 20 ± 5% | VIN at U10 pin 5 = 20V ±5% (19.0–21.0V). | — |
| TC-P-01 | pass | functional | U10 pin 6 | 20 ± 5% | U10 E-Fuse (TPS259474) output at pin 6 = 20V ±5% (19.0–21.0V). R14 DNP workaround for R0. | — |
| TC-P-02 | pass | functional | L1 output | 5 ± 3% | U2 (TPS54302) output at L1 = 5.0V ±3% (4.85–5.15V). | — |
| TC-P-03 | pass | functional | U16 pin 6 | 5 ± 3% | U16 E-Fuse (TPS259474) 5V output at pin 6 = 5.0V ±3% (4.85–5.15V). R64 DNP workaround for R0. | — |
| TC-P-04 | pass | functional | L2 output | 12 ± 3% | U12 (TPS54302) output at L2 = 12.0V ±3% (11.64–12.36V). | — |
| TC-P-05 | pass | functional | U14 pin 6 | 12 ± 3% | U14 E-Fuse (TPS259474) 12V output at pin 6 = 12.0V ±3% (11.64–12.36V). R24 DNP workaround for R0. | — |
| TC-P-06 | pass | functional | U30 output | 3.3 ± 3% | U30 (AMS1117-ADJ) LDO output = 3.3V ±3% (3.20–3.40V). | — |
| TC-P-07 | pass | functional | U9 output | 2.5 ± 3% | U9 (AMS1117-ADJ) LDO output = 2.5V ±3% (2.43–2.58V). | — |
| TC-P-08 | pass | functional | U8 output | 1.8 ± 3% | U8 (AMS1117-ADJ) LDO output = 1.8V ±3% (1.75–1.85V). | — |
| TC-P-09 | pass | functional | U26 output | 2.5 ± 0.05% | U26 (REF3425) precision reference output = 2.500V ±0.05% (2.4988–2.5013V). | — |
| TC-P-10 | pass | performance | VDD (U10 out), 5V rail | — | USB-C 20V, load 0–5A in 100mA steps: VDD within ±5%, 5V rail within ±3% at all load steps. No rail collapse before 5A supply limit. | — |
| TC-P-11 | pass | functional | U10 pin 6 | — | S1 press: U10 output goes to 20V. Second S1 press: U10 output drops to 0V. Toggle latch behaves correctly. | — |
| TC-P-12 | na | functional | U10 pin 6, load current | 5 ± 10% | Load increased beyond 5A: U10 E-Fuse trips and output drops to 0V. Trip current within 5A ±10% (4.5–5.5A). Requires supply capable of >5.5A. | — |
| TC-P-13 | open | performance | VDD (U10 out) | — | VDD stable (no drift >TBD) over ≥60s soak at 4.8A constant load. Characterise drift observed in P.10 at high current. | — |
| TC-R-00 | pass | functional | T1DATA[0:95] | — | All T1DATA[0:95] toggled from SO-DIMM side correctly read at N-Top side. DATA[96:99] inferred from routing. | — |
| TC-R-01 | pass | functional | T1DATA[0:95] | — | All T1DATA[0:95] toggled from N-Top side correctly read at SO-DIMM side. DATA[96:99] inferred from routing. | — |
| TC-S-00 | fail | functional | MON_VIN, MON_12V, MON_5V, MON_VPOE, MON_VBUS | — | U24 (AD5593R) ADC readings for MON_VIN, MON_12V, MON_5V, MON_VPOE, MON_VBUS all within ±5% of expected rail voltages (after scaling). | — |
| TC-S-01 | fail | functional | MON_IIN, MON_C12V, MON_C5V | — | U24 (AD5593R) ADC readings for MON_IIN, MON_C12V, MON_C5V all within ±10% of applied load current (after scaling). | — |
| TC-S-02 | open | functional | FAN_PWM, FAN_TACH | — | Fan runs at full speed at boot, then reduces to regulated speed when accordion process starts. U21 (MAX6650) responding via I2C. | — |
| TC-S-03 | pass | functional | RTC timekeeping — U32 (PCF8523) | — | Time written to PCF8523 via I2C. After ≥60s, time read back matches wait interval within ±2s. | — |
| TC-S-04 | open | functional | LED driver control — LP5012 brightness via I2C | — | LP5012 LED channels: off at 0x00, full brightness at 0xFF, mid brightness at 0x80. Visual verification at all three levels. | — |
Verification Records
| Test Case | Result | Measured | Notes | Date | By |
|---|---|---|---|---|---|
| TC-M-00 | pass | — | M.00 pass. N-Top J10/J11/J12 seated and aligned. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-M-01 | pass | — | M.01 pass. SO-DIMM J9 seated and latch engaged. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-M-05 | pass | — | M.05 pass. Fan securely mounted to back panel. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-M-03 | pass | — | M.03 pass. Comm module J3 seated. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-M-06 | pass | — | M.06 pass. Back panel mounted and fastened, fan screws all 4 engaged. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-M-02 | pass | — | M.02 pass. M2 J15 seated and screwed. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-M-04 | pass | — | M.04 pass. PCB fits Hammond enclosure. ESW-120-44-T-D header installed. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-M-07 | pass | — | M.07 pass. Top panel flush fit. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-M-08 | fail | — | M.08 FAIL. RPi connectors protrude 0.5mm beyond front panel cutout edge. DL-014 raised. R1 layout fix required. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-00 | pass | — | P.00 pass. Measured 20.0V at U10 pin 5. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-02 | pass | — | P.02 pass. Measured 5.0V at L1. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-01 | pass | — | P.01 pass. Measured 19.779V at U10 pin 6. R14 DNP workaround applied. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-04 | pass | — | P.04 pass. Measured 12.0V at L2. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-03 | pass | — | P.03 pass. Measured 5.0V at U16 pin 6. R64 DNP workaround applied. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-05 | pass | — | P.05 pass. Measured 12.0V at U14 pin 6. R24 DNP workaround applied. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-06 | pass | — | P.06 pass. Measured 3.361V at U30. U3 re-oriented rework applied. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-07 | pass | — | P.07 pass. Measured 2.527V at U9. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-08 | pass | — | P.08 pass. Measured 1.839V at U8. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-09 | pass | — | P.09 pass. Measured 2.500V at U26. Exactly on nominal. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-10 | pass | — | P.10 pass. Load sweep 0–4.9A: VDD and 5V rail within spec at all steps. R_path ≈ 0.239Ω. Slight drift noted at 4.8A — see TC-P-13 soak test (open). 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-11 | pass | — | P.11 pass. Power button on/off toggle latch correct. U32 PCF8523 removed (ISS-011 workaround) — no impact on this test. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-P-12 | na | — | P.12 DEFERRED. USB-C PD supply limited to 5A — cannot source >5.5A needed to trigger E-Fuse trip. Deferred to later test session with adequate supply. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-A-00 | pass | — | A.00 pass. DAC-out fidelity inferred from R.00/R.01 data bus tests — 96 T1DATA signals confirmed. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-A-01 | pass | — | A.01 pass. ADC-in fidelity inferred from R.00/R.01 data bus tests — 96 T1DATA signals confirmed. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-D-00 | pass | — | D.00 pass. I2C Ch0 scan — all expected internal devices responded with ACK. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-D-01 | pass | — | D.01 pass. I2C Ch1 scan — M2 LR module devices responded. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-D-02 | pass | — | D.02 pass. I2C Ch2 scan — SO-DIMM module devices responded. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-D-04 | pass | — | D.04 pass. I2C Ch4 scan — Comtop devices responded after ISS-008 off-by-one firmware fix applied 2026-04-08. Re-run confirmed pass. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-D-03 | pass | — | D.03 pass. I2C Ch3 scan — N-Top module devices responded. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-D-05 | pass | — | D.05 pass. SPI SO-DIMM connectivity confirmed via CS0_N. CS1_N inferred functional. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-D-06 | fail | — | D.06 FAIL. No UART data received on SO-DIMM. Root cause confirmed: UART TX/RX routed to wrong GPIO (GPIO12/13 vs GPIO14/15). R1 layout fix required per DL-017. Also needs pull-ups per DL-016. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-C-00 | pass | — | C.00 pass (partial). M2 I2C confirmed via D.01. Power rails and routing signals confirmed present. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-S-01 | fail | — | S.01 FAIL. U24 (AD5593R) current readings outside ±10% tolerance. Same root cause as ISS-010 — calibration resistors. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-S-00 | fail | — | S.00 FAIL. U24 (AD5593R) voltage readings outside ±5% tolerance. Raw ADC values incorrect — calibration resistors wrong. ISS-010 raised, DL-015 opened. SW calibration + R1 resistor fix needed. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-S-03 | pass | — | S.03 pass. PCF8523 RTC timekeeping within ±2s over 60s. Note: U32 subsequently removed (ISS-011) — RTC non-functional in current DUT state. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-R-00 | pass | — | R.00 pass. All 96 T1DATA signals confirmed SO-DIMM → N-Top. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
| TC-R-01 | pass | — | R.01 pass. All 96 T1DATA signals confirmed N-Top → SO-DIMM. 2026-05-07 session. | 2026-05-25 | gustav.kihlberg@e-sharp.se |
Decisions
E-007
I2C channels 5, 6, 7 verified by inference from channels 0–4
info
2026-05-26
All eight I2C channels are routed through the same 74CB3Q3251 bus mux architecture. Channels 0–4 cover all distinct module interfaces (internal/Ch0, M2/Ch1, SO-DIMM/Ch2, N-Top/Ch3, Comtop/Ch4). Channels 5–7 use the same mux topology and routing — passing 5 of 8 channels provides sufficient confidence for prototype verification.
Trade-offs: No test steps written for Ch5–Ch7. If D.00–D.04 reveal channel-specific mux or routing failures, this inference is invalidated and Ch5–Ch7 must be assessed. Ch7 was also found absent from firmware post-ISS-008 fix (ISS-009).
Notices
E-001
ISS-001/002: All 3 E-Fuse OVLO dividers wrong — R14/R24/R64 DNP workaround, blocking for R1
warning
open
2026-05-25
All three TPS259474 E-Fuses (U10/VDD, U14/12V, U16/5V) have incorrect OVLO resistor dividers that trip at normal operating voltage. Workaround: R14, R24, R64 DNP'd (disables OVLO). Severity 5. DL-001 opened. R1 must include corrected OVLO divider values. TC-P-01/03/05 pass notes reflect DNP workaround.
E-002
ISS-009: I2C Ch7 absent from FW after ISS-008 fix — SW follow-up pending
info
open
2026-05-25
After ISS-008 off-by-one fix was applied (2026-04-08), I2C Ch7 disappeared from firmware channel enumeration. Low severity — no test case currently targets Ch7. SW follow-up required before R1 FW release. Ref ISS-009.
E-003
ISS-011: PCF8523 (U32) removed as R0 workaround — RTC non-functional on DUT-01
info
open
2026-05-25
U32 (PCF8523) INT1 pin initialisation bug caused power button to be unreliable. R0 workaround: U32 physically removed. RTC timekeeping (TC-S-03) was verified before removal. DUT-01 now has no RTC. R1 fix per DL-019: correct INT1 initialisation in FW. Ref ISS-011.
E-004
ISS-010: U24 monitoring calibration error — S.00/S.01 fail; SW + R1 resistor fix needed
warning
open
2026-05-25
U24 (AD5593R) ADC voltage and current readings outside tolerance (>±5% voltage, >±10% current). Root cause: calibration resistors incorrect. TC-S-00 and TC-S-01 fail. DL-015 opened. Two-part fix needed: (1) SW calibration offset for R0, (2) corrected resistor values in R1 layout. Ref ISS-010.
E-005
19 open DL entries for R1 — 7 are Sev 4–5 critical changes
warning
open
2026-05-25
DESIGN_LOG.md contains 19 open DL entries (DL-001 through DL-019) all targeting R1. Critical (Sev 4–5): DL-001 (OVLO dividers), DL-010 (dVdT slew rate), DL-011 (silkscreen rename), DL-012 (RPi header loose fit), DL-014 (RPi protrusion 0.5mm), DL-017 (UART GPIO routing), DL-019 (RTC INT1/power button). All must be resolved before R1 layout is released.
E-006
ISS-012: UART SO-DIMM fail — wrong GPIO routing (GPIO12/13 vs GPIO14/15), R1 layout fix required
warning
open
2026-05-25
TC-D-06 fail. No UART data received on SO-DIMM J9. Root cause confirmed: UART TX/RX signals routed to GPIO12/13 instead of correct GPIO14/15. Cannot be fixed in firmware (hardware routing error). R1 layout fix required per DL-017. Also needs pull-up resistors per DL-016. Cross-reference ESH10000539 R1 for correct pinout. Ref ISS-012.
E-008
I2C bus mux (74CB3Q3251) Ch3 NAKs at cold boot
info
open
2026-06-04
Intermittent NAK on AD5593R behind mux Ch3 within first ~50ms after power-up; clears after retry. Likely POR timing. Flagging for firmware retry/backoff.
Design Rule Status
■ No violations ■ Warning ■ Error ■ Waived