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SNPS Snowball
ETT00000010 · Rev R0
testin_progress
Generated 2026-07-26 13:55 UTC

SNPS Snowball — a Synopsys-designed test board (TEST_HT3_V2, part SH100002584) that E-Sharp uses for test development. E-Sharp does not design or own this board; the board design and its requirements belong to Synopsys.

This project covers E-Sharp's test-development work using Snowball — part of the HT3 test stack alongside microHAPS (ETT00000008) and an HT3x2-HT4x2 adapter to test the B12-N HT3 Panel Board (ETT00000009).

  • Discipline: test (board design is out of scope — see [[schematic-review-final-decisions]] and the imported baseline notice for board reference info)
  • Vendor: Synopsys (SNPS)
  • Reference docs in repo docs/: implementation spec (DOC-00000274 R1.0 / TEST_HT3_V2), meeting notes, parts list/BOM (DOC-00000510 R1.1), schematic (DOC-00000511 R0.1), assembly spec (DOC-00000512 R1.1), ODB++ (DOC-00000513 R0.0), GenCAD netlist (DOC-00000514 R0.0)
  • Repository: https://github.com/esharpab/testdevelopment-snps-snowball

Related to B12-N HT3 Panel Board Test (ETT00000009 R0).

Coverage 0%
Done 0%
Requirements 0
Test Cases 6
Records 0

Milestones

No milestones defined.

Items (9)

Code Status Severity Kind Title Date
E-005 open info decision Snowball driver implemented in AccordionQ2 2026-06-13
E-006 open info decision APDS-9306-065 optical sensor support added to AccordionQ2 Snowball driver 2026-06-13
E-007 open info decision Synopsys IDPROM codec added to DeviceLibrary (reusable) 2026-06-13
E-008 open info decision Snowball module reads IDPROM, exposes ProductName/SerialNumber/ProductId (read-only) 2026-06-13
E-009 open info decision Sensor runtime config moved from modules.config to channels (dropdowns + free value) 2026-06-13
E-003 closed warning notice IP sensitivity + deferred setup items (BOM/netlist, verification plan, design rules) 2026-06-04
E-001 closed info notice Imported design baseline — TEST_HT3_V2 "Snowball" (Synopsys 2019) 2026-06-04
E-002 closed info decision Schematic-review final decisions (2019-10, JM/MJ/DR) 2026-06-04
E-004 closed info decision Scope: test development only — not designing Snowball 2026-06-04

Requirements

Code Status Category Title Statement Acceptance
REQ-TS-001 draft coverage Requirement Coverage This test system shall cover at least 90 % of the verifiable requirements in the linked project under test. Coverage report generated; ≥ 90 % of linked project requirements are covered by test steps.
REQ-TS-002 draft metrology Measurement Uncertainty All measurements made by this test system shall have a documented measurement uncertainty. Uncertainty shall be ≤ 25 % of the tightest applicable tolerance. Measurement uncertainty analysis on file; all uncertainties confirmed within limit.
REQ-TS-003 draft metrology Calibration Interval All reference instruments and standards used in this test system shall have a defined calibration interval and shall be within calibration at all times when the system is in use. Calibration records reviewed; all instruments are current.
REQ-TS-004 draft quality Pass/Fail Criteria Every test step in this test system shall have a documented, unambiguous numeric or boolean pass/fail criterion defined before the first production unit is tested. All test steps reviewed; each has an explicit pass criterion.
REQ-TS-005 draft metrology Repeatability (GR&R) The test system shall demonstrate acceptable measurement repeatability. Gauge R&R shall be ≤ 30 % of tolerance (≤ 10 % preferred). GR&R study completed and documented; GR&R within required limit.
REQ-TS-006 draft quality Test Limit Derivation Documented Every test step in this test system shall have its pass/fail limits derived from the documented tolerance stack of all components in the measurement path (references, dividers, resistors, ADCs, drivers, wiring). For each test step with numeric limits, evidence of derivation exists — `passCriterion` enumerates the relevant components and their tolerances, OR a linked `please_decision` documents the corner math, OR the implementing Maestro YAML carries a `Limit derivation` comment block.

Test Cases

Code Status Category Title / Signal Target Pass Criterion Linked REQ
TC-TS-001 open coverage Coverage Audit Generate a coverage report for the linked project; confirm ≥ 90 % of verifiable requirements are covered by test steps in this system. REQ-TS-001
TC-TS-002 open metrology Measurement Uncertainty Budget Complete a measurement uncertainty analysis for each measurement type; file the analysis and confirm all uncertainties are ≤ 25 % of tolerance. REQ-TS-002
TC-TS-003 open metrology Calibration Check Review calibration certificates for all instruments in the test system; confirm all are within their calibration interval. REQ-TS-003
TC-TS-004 open quality Pass/Fail Criteria Review Review all test steps; confirm each has a documented numeric or boolean pass criterion before first production test. REQ-TS-004
TC-TS-005 open metrology GR&R Study Perform a gauge repeatability and reproducibility study on the test system; verify GR&R ≤ 30 % of tolerance. REQ-TS-005
TC-TS-006 open quality Limit Derivation Audit For each test step in this fixture, confirm the limits trace to a documented tolerance stack — passCriterion lists components/tolerances OR a linked `please_decision` exists OR the implementing YAML has a `Limit derivation` block. REQ-TS-006

Verification Records

No verification records.

Decisions

E-002 Schematic-review final decisions (2019-10, JM/MJ/DR) info

Final dispositions from the Snowball schematic-review meetings (captured from docs/DOC-00000507/Meeting Notes for Snowball.docx). Carried forward as design constraints for any future revision/test development.

  • Vn pull-up = keep 3K3 (spec value). Rationale: up to four boards may stack → four 3K3 in parallel ≈ 825 Ω; both end values must work and be covered in verification. Switches added to enable up to 3× 3K3 in parallel. Rejected: changing to 1K to match the old test board (spec governs).
  • VRP/VRN pull-down test — dropped on Snowball. No access to the MB pull-down resistors; only existence of VRP/VRN is checked. Treated as regular inputs with pull-down.
  • uFPGA DAC Vref verification — dropped on Snowball. VREF is realized differently per motherboard and does not route to Snowball; keep only generic tests. Must be tested in cFPGA instead.
  • JTAG port required. Although bFPGA can be programmed via I2C (preferred in production), a dedicated JTAG port is kept for Snowball production tests because it is more robust.
  • Add real GND + short PRESENCEn to GND (add real ground on pin 144/146, ground the presence pin) to guarantee a good negative reference and non-ambiguous start-up.
  • HT3 LED test accepted (bonus feature) using optical sensor APDS-9306-065 (original candidate MAX44007/009 discontinued).
  • D10 (DONE LED) = no-mount on production boards; populated only during Snowball-only verification to keep the board single-sided (cost).
  • 3 vs 6 HT3 versions, interposer vs direct — deferred (decision to come later).
E-004 Scope: test development only — not designing Snowball info

Decision (2026-06-04, daniel@esharp.se): E-Sharp is not designing the Snowball board — we only use it in our test development. Board design and its requirements belong to Synopsys.

Actions taken:

  • Removed the 8 board-design functional requirements (former REQ-001..008: HT3 open/short detection, HapsTrak-3 std compliance, all-pins-verifiable, pin-ID granularity, JTAG header, no inter-connector dependency, VCCO-change, LED test). These describe Synopsys's board design, not E-Sharp deliverables. Board reference info is retained in [[imported-design-baseline-snowball]] and [[schematic-review-final-decisions]].
  • Dropped the electronics discipline (now test only). This removes the electronics design rules that were inherited — SYS-CL-001/002/003 (component-lifecycle / no-EOL-parts / discontinued-part-replacement) — which only apply to design ownership.

Retained: the generic test-system requirements (REQ-TS-001..006) and test/verification design rules (SYS-LM, SYS-SF, SYS-SO, SYS-TR, SYS-VA, SYS-VF), which govern E-Sharp's test-development rigor.

E-005 Snowball driver implemented in AccordionQ2 info

A software driver for the Snowball CPLD GPIO expander has been implemented in the AccordionQ2 hardware-manager codebase (branch upgrade-to-NET10). See the concept note "Snowball AccordionQ2 Driver — Concept Note" (knowledge doc #18) for the full design.

What was built (two layers)

  • SnowballCpld (submodules/devicelibrary/Devices/GPIO/Snowball/SnowballCpld.cs) — a reusable GpioExpander / II2cDevice at I²C 0x41, generic over N ports, implementing the CPLD CMD,PORT,Data codec (0xFF reset, 0x03/0x04 data, 0x05/0x06 tristate, 0x07 burst read, 0x08 register read, 0xF0 design ID). Reuses the existing GpioExpander/GpioBank caching/diffing scaffolding (bit conventions match: tristate 1=input = Configuration, data = Value).
  • Snowball module (Extensions/Snowball/) — IAdditionalModule + IBusHandler that hosts the device, exposes all 162 named GPIO signals from the GPIO Signal Mapping (knowledge doc #17) as digital channels, and owns the PCA9547 0x70 connector mux (control byte 0x08 | channel; CH1=J1/CH2=J2/CH3=J3). It contains the Snowball control logic only — physical I²C is delegated to the bus-owning module via the established I2CTransactionPathModuleParent.TransactValue pattern (same as PmbusEngine/Pmbus.cs).

Deployment

  • Added to the solution, the deploy build/copy pipeline (deploy-all-to-pi.ps1, postbuild.ps1), and modules.config.
  • On agent64.local, a Snowball entry was added to modules.config with I2CTransactionPath = 1.MicroHAPS.HCI.2|I2cMasterMux.I2C1 (the I²C bus is provided by the MicroHAPS module). Currently Enabled: false.

Status / open items

  • Builds clean; not yet exercised on hardware.
  • The Snowball DLL must be shipped via a full deploy before the agent64 entry can be enabled.
  • Mux part confirmed as PCA9547 (datasheet docs/PCA9547.pdf in the microHAPS repo); a MuxType config override exists for a PCA9545/9548-class bitmask-switch variant.

Discipline: this is E-Sharp test-development work using the Synopsys-owned Snowball board; the board design remains out of scope.

E-006 APDS-9306-065 optical sensor support added to AccordionQ2 Snowball driver info

Extends the AccordionQ2 Snowball driver (see entry E-005 and concept note #18) with support for the Snowball board's APDS-9306-065 ambient light sensor at I²C 0x52, behind the same 0x70 PCA9547 mux as the CPLD.

What was added

  • APDS9306 device (submodules/devicelibrary/Devices/LightSensor/APDS9306.cs) — ChannelCapableDevice / II2cDevice, sibling to the existing VEML7700. Configurable gain (1/3/6/9/18×), resolution/integration time (20-bit/400 ms … 13-bit/3.125 ms) and measurement rate; checks PART_ID (expects 0xB3); reads the 20-bit ALS value and computes lux = (raw / gain) × (100 / integration_ms) × LuxFactor. Register map/formula taken from the Broadcom datasheet (AV02-4755EN), cross-checked against an open-source driver.
  • Snowball module now hosts both the CPLD and the sensor, exposing two read-only analog channels — OPT_ALS (raw 20-bit counts) and OPT_LUX (normalised light level). Sensor access is wrapped in the existing mux selection (a single mux selection covers a combined CPLD + sensor refresh).
  • Sensor settings exposed via modules.config InitialData: SensorAddress, SensorGain, SensorResolution, SensorMeasRate, SensorLuxFactor.

Builds clean; not yet exercised on hardware.

Open items

  • EEPROM (0x50) support is still pending — awaiting the content spec from the user.
  • SensorLuxFactor defaults to 1.0 (output = gain/integration-normalised counts). The true lux scale for the -065 optical window should be set once the calibrated factor is known; until then OPT_ALS raw counts are the unambiguous reading.
E-007 Synopsys IDPROM codec added to DeviceLibrary (reusable) info

Added a reusable codec for the Synopsys IDPROM content structure to DeviceLibrary: submodules/devicelibrary/Devices/Eeprom/SynopsysIdprom.cs (namespace DeviceLibrary.Devices.Eeprom). Ported faithfully from AccordionTS/Idprom.cs in the esharp-accordion-projects-accordionwrapper repo so it can be reused across projects.

This is the content layout of the Snowball board EEPROM at I²C 0x50 (the structure previously flagged as "pending" in entry E-006). It is the Synopsys format — deliberately distinct from E-Sharp's own IDPROM (handled by Identity), since both live at 0x50 on different boards.

Structure (255-byte image, total 0xFF)

  • 0x00 DataStructureRevision (0x01) · 0x01–0x02 VendorCode (UInt16 big-endian) · 0x03–0x04 ProductCode · 0x05 VersionCode · 0x06 SubVersionCode · 0x07 ConnectorNumber · 0x08 SupportedVoltages (IoVoltages flags) · 0x09–0x0F reserved
  • 0x10–0x23 ProductName (20 ASCII) · 0x24–0x2F ProductId (12 ASCII) · 0x30–0x3F SerialNumber (16 ASCII) · 0x40–0xFE BoardSpecificData (191 bytes)

Provides AsByteArray() / FromByteArray() / Compare(other, skipFields…) / ToString() and constructors for build-from-fields or parse-from-bytes. The byte layout (incl. the asymmetric serial-number handling — written as 16 ASCII bytes, read back as a 1-char code + 15-digit number) is preserved exactly as a hardware contract. Builds clean.

Remaining EEPROM work (not yet done)

  • An I²C EEPROM device (read/write the 0x50 part, e.g. like ID_24AA02UID) and wiring it into the Snowball module to expose the decoded IDPROM fields as channels, behind the existing 0x70 mux.
E-008 Snowball module reads IDPROM, exposes ProductName/SerialNumber/ProductId (read-only) info

Completes the Snowball EEPROM work flagged in E-006/E-007. The Snowball module now reads the board's Synopsys IDPROM (EEPROM at 0x50, behind the 0x70 mux) at Reset and exposes three read-only register channels (direction = IN): ProductName, SerialNumber, ProductId.

Implementation

  • At Reset(), under a single mux selection, the module reads the IDPROM header block (bytes 0x00–0x3F, enough for the three fields), parses it with SynopsysIdprom (the reusable codec from E-007), and bakes the decoded values into three RegisterChannels grouped under "IDPROM".
  • The read is best-effort: a missing/unreadable IDPROM logs a warning and yields blank fields rather than aborting module load.
  • Scope intentionally limited per request: no write path, no full-content dump — only the three identity fields. Values are read once at Reset (board identity is static).
  • New optional config EepromAddress (default 0x50) in modules.config InitialData.

Builds clean; not yet exercised on hardware. With this, all three Snowball-board I²C devices (CPLD GPIO, APDS-9306-065, IDPROM) are supported by the AccordionQ2 driver.

E-009 Sensor runtime config moved from modules.config to channels (dropdowns + free value) info

Refactor of the APDS-9306-065 configuration (refines E-006). The sensor's runtime settings no longer live in modules.config InitialData; they are now settable channels on the Snowball module:

  • SensorGain, SensorResolution, SensorMeasRateMultiplexerChannel dropdowns; options come from the APDS9306 enum names; selecting a value re-applies it to hardware via sensor.Reset() under the mux.
  • SensorLuxFactorRegisterChannel (free numeric value). LuxFactor is a continuous calibration multiplier (lux per normalised count) — not bounded 0–1 and not a discrete set, so a free value is correct rather than a RatiometricChannel (0–1/%) or MultiplexerChannel (discrete). It is a software-only scale (no register write).

Only the device addresses remain static config: InitialData now carries I2CTransactionPath, MuxAddress, MuxType, MuxChannel, CpldAddress, SensorAddress, EepromAddress. The four Sensor* runtime keys were removed from the repo modules.config.

Builds clean. Not yet deployed — the on-target agent64 DLL + modules.config still carry the old form and need a redeploy + config re-sync to match the repo.

Notices

E-001 Imported design baseline — TEST_HT3_V2 "Snowball" (Synopsys 2019) info closed

This PLEASE project (ETT00000010 R0) imports an existing Synopsys design rather than a fresh design.

Identity

  • Internal name: Snowball; formal name TEST_HT3_V2
  • PCBA part number: SH100002584 — "Snowball_Test_HT3 PCBA", board rev R0.2 (per Omnify/Empower PackageReport)
  • Implementation spec: DOC-00000274, spec rev R1.0 (2019-10-23, Li Xie)
  • Controller (bFPGA): Lattice MachXO3 LCMXO3LF-9400C-6BG256C (256-ball caBGA, 206 I/O, 2× I2C hard cores)

Purpose: A test board that detects open and shorted pins on HapsTrak-3 (HT3) connectors of HAPS systems. Supersedes the earlier "TEST_HT3" board, fixing 6 known issues (screw-hole placement vs HT3 std, VCCO 2.5↔3.3 V negotiation clamp, 2-FPGA-for-3-connector partitioning, cross-connector Vn measurement ambiguity, mandatory middle connector, untestable GND pin 136).

Docs in repo docs/ (Omnify export): DOC-00000507 (spec + meeting notes), DOC-00000510 R1.1 (parts list/BOM), DOC-00000511 R0.1 (schematic), DOC-00000512 R1.1 (assembly spec), DOC-00000513 R0.0 (ODB++), DOC-00000514 R0.0 (GenCAD netlist).

Note the document/board revisions predate this PLEASE record; tracked here as R0 for E-Sharp's test-development engagement.

E-003 IP sensitivity + deferred setup items (BOM/netlist, verification plan, design rules) warning closed

Open follow-ups from project setup (2026-06-04):

  • IP sensitivity — Snowball design data (BOM, schematic, ODB++, GenCAD) is Synopsys-origin and may be confidential, like the sibling microHAPS project (ETT00000008) whose design docs are marked SYNOPSYS CONFIDENTIAL. Project was created with ipSensitive=false; recommend confirming whether it should be set true and whether the BOM may be imported into the shared PLEASE component library.
  • BOM / netlist ingest — deferred. docs/ contains the parts list (DOC-00000510 R1.1), GenCAD netlist (DOC-00000514 R0.0) and ODB++ (DOC-00000513 R0.0), not yet ingested into the component library / netlist. Gate on the IP decision above.
  • Verification plan — deferred. Template seeded 6 generic test cases (TC-TS-001..006) + a plan; a spec-driven plan (HT3 open/short, pin-group ID, VCCO-change, LED optical-sensor) via please_plan_suggest is not yet drafted.
  • Design rules — only the 16 template-applied rules are active; the 4 suggested green-gate rules (SYS-VF-001/003, SYS-VA-001, SYS-TR-001) were not added.

See [[imported-design-baseline-snowball]] and [[schematic-review-final-decisions]].

Design Rule Status

No violations   Warning   Error   Waived