Mini-PSU Precision Module — R0. 2-channel adjustable light-table power (0–24 V / up to 1.5 A) with precision current/voltage control. Sub-assembly of the Collimator LED Control Box (ESH10000672 R1).
Lineage: based on ESH10000662 (Mini-PSU) — completely shared PCB. ESH10000662 is tuned for power; ESH10000690 is tuned for current precision. The functional difference is set mostly by resistor values (current-sense shunts / control scaling), not by layout. ESH10000662 is intentionally not part of the ESH10000672 R1 stack — the customer wants the slimmer precision variant. (See related_to link.)
Lightweight shell — full new_project workflow pending. Imported as a dependency of ESH10000672 R1.
Milestones
| Code | Title | Status | Target | Achieved | TC |
|---|---|---|---|---|---|
| MS-001 | Tape-out (PCB to JLC) | marker | 2026-07-03 | — | 0 / 0 |
| MS-002 | Bring-up | marker | 2026-07-17 | — | 0 / 0 |
Items (4)
| Code | Status | Severity | Kind | Title | Date |
|---|---|---|---|---|---|
| E-001 | open | info | decision | ESH10000690 is a resistor-set variant of ESH10000662 (shared PCB); 662 excluded from the 672 stack | 2026-06-18 |
| E-002 | open | info | decision | Precision variant spec: 600mA/ch max, 12-bit current set, ≤0.1mA readback accuracy | 2026-06-18 |
| E-004 | open | info | decision | Current-sense shunt RIS = 150 mΩ (precision variant, 600 mA FS) | 2026-06-18 |
| E-003 | closed | warning | notice | LSB mismatch: 12-bit over 600mA FS = 0.146mA/step, not 0.125mA — REQ-006 pending | 2026-06-18 |
Requirements
| Code | Status | Category | Title | Statement | Acceptance |
|---|---|---|---|---|---|
| REQ-001 | draft | Performance | Maximum output voltage 24V per channel | The device shall provide a maximum output voltage of 24V per channel. | VPSU ≥ 24.0V measured at no load with VSET at DAC maximum (5V). |
| REQ-002 | draft | Performance | Maximum continuous output current 600mA per channel | The device shall provide a maximum continuous output current of 600mA per channel. | Load sweep stable at 600mA per channel at maximum VOUT (24V); VPSU remains within ±2% of setpoint (23.52–24.48V) throughout sweep. Both channels active simultaneously. |
| REQ-003 | draft | Performance | PCB hotspot ≤ 50°C at full load | The device shall not exceed 50°C (case / PCB hotspot) at full load and 25°C ambient. | Thermal measurement at VOUT=24V, ILOAD=600mA per channel (both channels active), 25°C ambient; no point on case or PCB exceeds 50°C after thermal soak (30 min minimum). Measure at L1, L2, U1, U3, L3, L4. |
| REQ-004 | draft | Performance | Output voltage drift ≤ ±0.1% over 8 hours | Output voltage drift shall not exceed ±0.1% over 8 hours of continuous operation. | VOUT measured at t=0 and t=8h; VOUT=24V, ILOAD=600mA per channel, both channels active; |ΔVOUT| ≤ 0.1% of setpoint (≤±24mV). |
| REQ-005 | draft | Performance | Load transient ≤ 1% overshoot, recovery ≤ 5µs | Output voltage overshoot and undershoot on a 0A→600mA load step shall not exceed 1% of setpoint, with recovery within 5µs. | 0A→600mA load step applied per channel; peak overshoot/undershoot ≤ 1% of VOUT setpoint (≤240mV at 24V); output returns to within ±1% of setpoint within 5µs. Both channels active. |
| REQ-006 | draft | Performance | CC limit linearity ≤ ±0.1% FS over active ISET range, 12-bit resolution | The constant current limit shall be linearly proportional to the ISET DAC voltage over the active control range (0–600mA), controlled with 12-bit resolution. | ISET swept over the active range (0–600mA); measured current limit vs ISET; residual non-linearity ≤ ±0.1% of full scale (600mA) = ±0.6mA; resolution ≈ 0.146mA/step (12-bit DAC, 4096 steps over 0–600mA FS); monotonic response required throughout the range. |
| REQ-007 | draft | Performance | Output voltage linearity ≤ ±1% of setpoint over 5–24V range | The output voltage shall be linearly proportional to the VSET DAC voltage over the active control range (5–24V), with residual non-linearity not exceeding ±1% of the commanded setpoint at any point. | VSET swept over the active range corresponding to 5–24V output (VSET ≈ 0.69V–3.33V at 7.2 V/V gain); VPSU measured at ≥10 evenly spaced setpoints; |VPSU_measured − VPSU_commanded| ≤ 1% of VPSU_commanded at every point; monotonic response required throughout the range. |
| REQ-008 | draft | Performance | Conversion efficiency ≥ 80% across 5–24V output range | The power conversion efficiency shall be ≥ 80% across the entire programmable output voltage range (5–24V) at rated load. | Efficiency η = P_out / P_in × 100% measured at VOUT ∈ {5, 8, 12, 16, 20, 24}V with ILOAD = 600mA per channel (both channels active simultaneously); P_in measured on VT rail (VT × I_VT); P_out = VPSU × I_load per channel × 2; η ≥ 80% at every setpoint. |
| REQ-009 | draft | Performance | Output current readback accuracy ≤ ±0.1mA | The measured (readback) output current shall be accurate to within ±0.1mA of the true channel output current, with stable accuracy across the active current range (0–600mA). | Channel current set across 0–600mA at ≥10 points; readback compared against a calibrated reference ammeter; |I_readback − I_reference| ≤ 0.1mA at every point, repeatable across the range and stable over a 30-minute soak (25°C ambient). |
| REQ-010 | draft | Design | Passive RC filter on current-measurement ADC input | Each output-current measurement ADC input shall be preceded by a passive RC low-pass filter to attenuate switching noise and provide anti-alias filtering ahead of the converter. | Schematic and ODB++ review confirms a passive RC low-pass filter (series resistor + shunt capacitor to GND) present on every current-measurement ADC input channel; filter is passive only (no active components in the signal path to the ADC). |
Test Cases
| Code | Status | Category | Title / Signal | Target | Pass Criterion | Linked REQ |
|---|---|---|---|---|---|---|
| TC-001 | open | performance | Maximum output voltage per channel | — | VPSU ≥ 24.0V at no load with VSET at DAC maximum (5V), both channels. | REQ-001 |
| TC-002 | open | performance | Maximum continuous output current 600mA/ch | — | Load sweep stable at 600mA/ch at VOUT=24V; VPSU within ±2% (23.52–24.48V) throughout; both channels active. | REQ-002 |
| TC-003 | open | environmental | Thermal hotspot at full load | — | At VOUT=24V, ILOAD=600mA/ch, 25°C ambient, 30-min soak: no point at L1/L2/U1/U3/L3/L4 exceeds 50°C. | REQ-003 |
| TC-004 | open | performance | Output voltage drift over 8 hours | — | VOUT=24V, ILOAD=600mA/ch, both channels; |ΔVOUT| ≤ ±0.1% (≤±24mV) between t=0 and t=8h. | REQ-004 |
| TC-005 | open | performance | Load transient response | — | 0A→600mA step/ch: overshoot/undershoot ≤1% setpoint (≤240mV at 24V); recovery to ±1% within 5µs; both channels. | REQ-005 |
| TC-006 | open | performance | CC limit linearity and 12-bit resolution | — | ISET swept 0–600mA: residual non-linearity ≤±0.1% FS (±0.6mA); resolution ≈0.146mA/step (12-bit, 4096 steps); monotonic. | REQ-006 |
| TC-007 | open | performance | Output voltage linearity over 5–24V | — | VSET swept for 5–24V output, ≥10 points; |VPSU_meas − VPSU_cmd| ≤1% at every point; monotonic. | REQ-007 |
| TC-008 | open | performance | Conversion efficiency over output range | — | η = Pout/Pin ≥80% at VOUT ∈ {5,8,12,16,20,24}V with ILOAD=600mA/ch (both channels). | REQ-008 |
| TC-009 | open | performance | Output current readback accuracy | — | Current set 0–600mA at ≥10 points vs calibrated reference; |I_readback − I_ref| ≤0.1mA at every point; stable over 30-min soak. | REQ-009 |
Verification Records
No verification records.
Decisions
Decision
ESH10000690 R0 (Mini-PSU Precision Module) is built on the exact same PCB as ESH10000662 (Mini-PSU). The two are component-value variants of one layout:
- ESH10000662 — tuned for power (24 V / ~2.5 A use case).
- ESH10000690 — tuned for current precision (light-table control).
The functional difference is set mostly by resistor values (current-sense shunts / control scaling), not by layout changes.
Rationale
The customer wants a slimmer, precision-focused variant for the Collimator LED Control Box (ESH10000672 R1). The light-table role therefore uses ESH10000690 R0, and ESH10000662 is intentionally NOT a dependency of ESH10000672 R1.
Rejected alternative
Use ESH10000662 directly in the 672 stack — rejected: its power-oriented current range/resolution is unsuitable for light-table intensity control (cf. R0 ISS-006, where 662's range/resolution was the core problem).
Follow-up
- When the ESH10000690 project is fleshed out, baseline it from the ESH10000662 design and capture the precise resistor delta (shunt values + control scaling) as the variant definition.
- See
related_tolink ESH10000690 → ESH10000662.
Decision
ESH10000690 R0 precision-variant electrical spec (vs ESH10000662 power variant):
- Max continuous output current: 600 mA per channel (reduced from 662's 1.5 A/ch).
- Current set (CC limit) resolution: 12-bit DAC control.
- Current readback (ADC measure) accuracy: ≤ ±0.1 mA, stable across the 0–600 mA range.
- Output voltage range unchanged: 0–24 V/ch (shared PCB, voltage path retained).
Rationale
The light-table current-source role needs fine, precise current control at low currents; 662's 1.5 A range/resolution was unsuitable (cf. R0 ISS-006). Lowering FS to 600 mA and adding a precise readback path is the variant's whole purpose. Difference realised mostly via current-sense shunt / control-scaling resistor values on the shared layout (see E-001).
Impact on requirements
Drove REQ-002 (600 mA), and updated load conditions in REQ-003/004/005/008. Added REQ-009 (readback accuracy ≤0.1 mA). REQ-006 (CC linearity + 12-bit resolution) pending LSB resolution — see related notice.
Follow-up
- Capture the exact resistor delta (shunt values + scaling) as the variant definition once the design is baselined from 662.
Decision
Use RIS = 150 mΩ for the LT3942 current-sense shunt on ESH10000690 (precision variant), vs 50 mΩ on ESH10000662.
Rationale
Maps the LT3942 linear CTRL window (0.25–1.15 V) to the 600 mA full-scale target:
I_IS(MAX) = (VCTRL − 0.25 V) / (10 × RIS); at VCTRL = 1.15 V → RIS = 0.90 V / (10 × 0.6 A) = 0.15 Ω.
- 662 R1: RIS = 50 mΩ → 0.25–1.15 V maps to 0 → 1.80 A.
- 690 R0: RIS = 150 mΩ → 0.25–1.15 V maps to 0 → 600 mA.
This is the primary current-sense resistor delta of the variant (see E-001/E-002).
To confirm
⚠️ 150 mΩ is derived from the datasheet formula, not yet verified against the ESH10000690 schematic/BOM. Confirm the actual fitted shunt value when the design is baselined from 662. Component-value verification (gain/offset 0.5/0.25 → recompute for 150 mΩ) also pending.
Notices
Observation
Proposed current-set resolution of 0.125 mA/step is not achievable with a true 12-bit DAC at 600 mA full scale:
- 12-bit over 0–600 mA FS → LSB = 600/4096 = 0.1465 mA/step.
- If only a fraction of the 0–5 V DAC window is usable (as on 662, ~3571 active steps) → LSB ≈ 0.168 mA/step (coarser).
- 0.125 mA/step at 12-bit implies FS ≈ 512 mA (below the 600 mA max), or requires >12-bit resolution.
Why it matters
Blocks finalising REQ-006 (CC-limit linearity + set resolution). Need engineer decision on which target to hold:
- Accept ~0.146 mA LSB at 600 mA FS / full 12-bit, or
- Lower FS (e.g. 512 mA) to hit 0.125 mA LSB, or
- Use higher-resolution set DAC.
Next step
Resolve target, then create REQ-006 with the agreed resolution + linearity (FS%) spec.
Open Conflicts
| Severity | Entity | Details | Detected |
|---|---|---|---|
| error | TC-001 | Rule SYS-VF-001 (TestCaseCompletion): TC-001 (Maximum output voltage per channel) has no verification record | 2026-06-18 |
| error | TC-002 | Rule SYS-VF-001 (TestCaseCompletion): TC-002 (Maximum continuous output current 600mA/ch) has no verification record | 2026-06-18 |
| error | TC-003 | Rule SYS-VF-001 (TestCaseCompletion): TC-003 (Thermal hotspot at full load) has no verification record | 2026-06-18 |
| error | TC-004 | Rule SYS-VF-001 (TestCaseCompletion): TC-004 (Output voltage drift over 8 hours) has no verification record | 2026-06-18 |
| error | TC-005 | Rule SYS-VF-001 (TestCaseCompletion): TC-005 (Load transient response) has no verification record | 2026-06-18 |
| error | TC-006 | Rule SYS-VF-001 (TestCaseCompletion): TC-006 (CC limit linearity and 12-bit resolution) has no verification record | 2026-06-18 |
| error | TC-007 | Rule SYS-VF-001 (TestCaseCompletion): TC-007 (Output voltage linearity over 5–24V) has no verification record | 2026-06-18 |
| error | TC-008 | Rule SYS-VF-001 (TestCaseCompletion): TC-008 (Conversion efficiency over output range) has no verification record | 2026-06-18 |
| error | TC-009 | Rule SYS-VF-001 (TestCaseCompletion): TC-009 (Output current readback accuracy) has no verification record | 2026-06-18 |
| warning | REQ-001 | Rule SYS-VA-001 (RequirementApproval): REQ-001 (Maximum output voltage 24V per channel) status is 'draft', expected 'approved' | 2026-06-18 |
| warning | REQ-002 | Rule SYS-VA-001 (RequirementApproval): REQ-002 (Maximum continuous output current 600mA per channel) status is 'draft', expected 'approved' | 2026-06-18 |
| warning | REQ-003 | Rule SYS-VA-001 (RequirementApproval): REQ-003 (PCB hotspot ≤ 50°C at full load) status is 'draft', expected 'approved' | 2026-06-18 |
| warning | REQ-004 | Rule SYS-VA-001 (RequirementApproval): REQ-004 (Output voltage drift ≤ ±0.1% over 8 hours) status is 'draft', expected 'approved' | 2026-06-18 |
| warning | REQ-005 | Rule SYS-VA-001 (RequirementApproval): REQ-005 (Load transient ≤ 1% overshoot, recovery ≤ 5µs) status is 'draft', expected 'approved' | 2026-06-18 |
| warning | REQ-006 | Rule SYS-VA-001 (RequirementApproval): REQ-006 (CC limit linearity ≤ ±0.1% FS over active ISET range, 12-bit resolution) status is 'draft', expected 'approved' | 2026-06-18 |
| warning | REQ-007 | Rule SYS-VA-001 (RequirementApproval): REQ-007 (Output voltage linearity ≤ ±1% of setpoint over 5–24V range) status is 'draft', expected 'approved' | 2026-06-18 |
| warning | REQ-008 | Rule SYS-VA-001 (RequirementApproval): REQ-008 (Conversion efficiency ≥ 80% across 5–24V output range) status is 'draft', expected 'approved' | 2026-06-18 |
| warning | REQ-009 | Rule SYS-VA-001 (RequirementApproval): REQ-009 (Output current readback accuracy ≤ ±0.1mA) status is 'draft', expected 'approved' | 2026-06-18 |
Design Rule Status
■ No violations ■ Warning ■ Error ■ Waived